L64704 LSI Logic Corporation, L64704 Datasheet - Page 70

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3-38
Reserved
Set to 0
F_OUT_HiZ
CLK_LCF_Suppress
CLK_VCO_SWAP
CLK_DR[1:0] Decimation Filter Select
L64704 Registers
Reserved Bits
These bits are reserved for LSI Logic internal use only.
Reserved bits should always be set to 0, and will produce
random results when read.
Set to 0
You should set this bit to 0 for proper operation.
Functional Outputs 3-stated
Set this bit to put the CLK_VCOP/N pins into a high
impedance condition.
CLK_LCF_Suppress in Timing Error Detector
Set this bit to disable the Automatic Frequency Controller
(AFC). For more information see Section
Acquisition and Tracking Modes.”
CLK Outputs Polarity Swap
Program this bit to set the polarity of the clock output pins
CLK_VCOP/N. For more information see Section
“Channel Clock Recovery.”
Program the Decimation Filter Select field to set the
amount of decimation, and therefore the oversampling
ratio. For more information see Section
Filters.”
D4
0
1
D3
0
1
D2
0
1
Definition
Normal
Hi-Z
Definition
Normal
Suppressed
Definition
Normal
Swapped
5.3, “Decimation
5.5.2, “Clock
5.5,
[1:0]
6
5
4
3
2