L64704 LSI Logic Corporation, L64704 Datasheet - Page 43

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.4
Group 2
Registers
3.4.1
System Mode
Register (SMR)
Group 2 contains two 16-bit registers; the System Mode Register and the
System Status Register. The System Mode Register is accessed by
writing the Group 2 address, and the System Status Register is
accessed by reading the Group 2 address. Because the L64704 has an
8-bit architecture, each 16-bit register is accessed as two 8-bit registers:
The microcontroller accesses these registers by setting A[2:0] = 010
can access these registers at any point during Satellite Decoder opera-
tion without interrupting the internal processing unit.
The 16-bit System Mode Register (SMR) is a write-only register that
allows the external microcontroller to control the L64704. Bits [15:8] of
the register enable interrupts for the Demodulator and bits [7:0] of the
register enable interrupts for the FEC module.
Because the SMR is arranged as two 8-bit registers, the microcontroller
must perform two consecutive writes to the register address. The lower
eight bits of the APR must be set to 0x00 before accessing the SMR.
The eight LSBs of the SMR are accessed first. The auto-increment
mechanism toggles the Address Pointer Register after the first access so
that the next write goes to the MSB. If you only want to write the upper
byte, you can set APR = 0x01 before the write operation.
Group 2 Registers
Note:
The Phase-Locked Loop must be locked for the status
signals to be valid.
APR R/W
APR R/W
0
1
W
W
R
R
7
7
SMR[15:8]
STS[15:8]
SMR[7:0]
STS[7:0]
0
0
2
3-11
. It