L64704 LSI Logic Corporation, L64704 Datasheet - Page 73

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.6.17
Group 4,
APR 19
Power
Reference Level
3.6.18
Group 4,
APR 20
Power
Estimation
Bandwidth and
I/Q DC Offset
This register sets the reference power level for the Analog to Digital
Convertor. For details on setting this register, see Section
Range and Power Reference.”
Read/Write: R/W
This register is used to enable internal DC offset compensation on the I
and Q signals and set the power estimation bandwidth.
Read/Write: R/W
Reserved
INT_DC
Group 4 Registers
APR
APR
19
20
D7
D7
Reserved
These bits are reserved for LSI Logic internal use only.
Reserved bits should always be set to 0, and will produce
random results when read.
Internal DC Offset Compensation on I and Q
Set this bit to enable internal DC offset compensation on
the I and Q signals.
D2
0
1
1
1
1
D2
0
1
D6
D6
Definition
Disabled
Enabled
Reserved
D1
1
0
0
1
1
D5
D5
D0
1
0
1
0
1
PWR_REF[7:0]
D4
D4
Definition
Input Every Eighth Sample
Input Every Sixteenth Sample
Illegal
Illegal
Illegal
D3
D3
INT_ DC
D2
D2
PWR_BW[1:0]
D1
D1
5.7.1, “ADC
D0
D0
[7:3]
3-41
2