L64704 LSI Logic Corporation, L64704 Datasheet - Page 60

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.6.1
Group 4,
APR 0 PLL
Parameter N
3.6.2
Group 4,
APR 1 PLL
Parameter S
3-28
PLL Configuration Parameter N is used to configure the PLL module for
clock synthesis.
Read/Write: R/W
Set to 1
Set to 0
PLL_N
PLL Configuration Parameter S is used to configure the PLL module for
clock synthesis.
Read/Write: R/W
Set to 0
PLL_S
APR
APR
L64704 Registers
0
1
Set to 1
D7
D7
Set to 0
Set to 0
Set to 1
LSI Logic internal test bit. You must set this bit to 1.
Set to 0
LSI Logic internal test bit. You must set this bit to 0.
PLL Configuration Parameter N
PLL_N[5:0] is one of four parameters (PLL_S, PLL_N,
PLL_T, PLL_M) that you must set to configure the PLL
module for clock synthesis. For more information see
Section
Set to 0
LSI Logic internal test bit. You must set these bits to 0.
PLL Configuration Parameter S
PLL_S[5:0] is one of 4 parameters (PLL_S, PLL_N,
PLL_T, PLL_M) that you must set to configure the PLL
module for clock synthesis. For more information see
Section
D6
D6
4.4, “PLL Clock Generation.”
4.4, “PLL Clock Generation.”
D5
D5
D4
D4
D3
D3
PLL_N[5:0]
PLL_S[5:0]
D2
D2
D1
D1
D0
D0
[5:0]
[7:6]
[5:0]
7
6