L64704 LSI Logic Corporation, L64704 Datasheet - Page 39

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.1.1
Parallel Host
Mode Register
Operations
Figure 3.2
Issue a Hard
Reset
Figure 3.3
Initialize APR0 and
APR1 to Zero
The L64704 is addressable through either a serial or a parallel host
interface. The interface used depends on the value of the HOST_MODE
pin (HIGH: Parallel Host Interface mode, LOW: Serial Host Interface
mode) when the L64704 is reset. The mode, however, cannot be
changed once the part is in operation. This section shows the steps
required to read and write the L64704’s registers when you are in Parallel
Host Interface mode. Serial Host Interface mode is discussed in Section
3.1.2, “Programming Using the Serial Interface.”
The following diagrams demonstrate read and write operation through
the parallel microprocessor interface.
Step 1. Issue a hard reset to the chip
RESET
Step 2. Set APR0 and APR1 to zero by writing a zero to addresses 0
Step 3. Write to the Configuration registers in Group 4. Start from loca-
L64704 Register Overview
DTACK
OCLK
READ
D[7:0]
A[2:0]
CS
AS
Note:
OCLK cycles, before the next step.
and 1. (See
tion zero, and let the auto-increment mechanism advance to the
next location with every low-to-high transition of CS.
OCLK must run throughout the initialization process.
0
Figure
00
3.3).
1
(Figure
00
3.2). Wait for t
WK
, 280
3-7