L64704 LSI Logic Corporation, L64704 Datasheet - Page 189

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

B.1
Controlling the
L64704’s
BPSK/QPSK
Demodulator
Loops
Appendix B
L64704
Application Notes
This appendix provides updated information on the use of LSI Logic’s
L64704 Satellite Decoder in a typical application. It is divided into these
sections:
The QPSK Demodulator portion of the L64704 has three independent
loops that a microcontroller must configure properly. The first loop to
monitor is the AGC loop. After the microcontroller ensures the AGC loop
is working, it can proceed to the Clock Synchronization and Carrier Syn-
chronization loops.
process that runs on the microcontroller. You should program the micro-
controller to monitor the L64704’s flags.
Section B.1, “Controlling the L64704’s BPSK/QPSK Demodulator
Loops,”
Clock Synchronization and Carrier Synchronization loops.
Section B.2, “L64704 QPSK Demodulator Debugging Tips,”
information on how to debug problems in the L64704’s demodulator.
Section B.3, “QPSK Demodulator Configuration Example,”
example of how the demodulator portion of the L64704 can be
programmed.
Section B.4, “Configuring the L64704 FEC Decoder to the DVB
Specifications,”
programmed to adhere to the DVB specifications.
describes how to program and monitor the L64704’s AGC
Figure B.1
shows an example of how the FEC Decoder can be
is a flow diagram that explains the simple
shows an
provides
B-1