L64704 LSI Logic Corporation, L64704 Datasheet - Page 95

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

Table 4.2 (Cont.)
Values for PLL_S,
PLL_N, PLL_T, and
PLL_M
1. Although the PLL module can generate PCLK frequencies of up to 80 MHz, the maximum OCLK
(Sheet 4 of 4)
Code
Rate PLL_S[5:0] PLL_N[5:0] PLL_T[4:0] PLL_M[1:0]
7/8
frequency is limited to 62.5 MHz.
14
28
42
PLL Clock Generation
12
1
2
4
8
6
8
4
2
2
4
2
3
1
0
3
2
1
0
3
2
1
3
2
1
3
2
3
2
1
0
Min Max
70
50
40
70
60
50
40
70
60
50
70
60
50
70
60
70
60
50
42
VCO
80
60
50
80
70
60
50
80
70
60
80
70
60
80
70
80
70
60
50
40.00
28.57
22.86
20.00
17.14
14.29
11.43
10.00
Min
8.57
7.14
5.00
4.29
3.57
6.67
5.71
3.33
2.86
2.38
2.00
SCLK
45.71
34.29
28.57
22.86
20.00
17.14
14.29
11.43
10.00
Max
8.57
5.71
5.00
4.29
7.62
6.67
3.81
3.33
2.86
2.38
70.00
50.00
40.00
35.00
30.00
25.00
20.00
17.50
15.00
12.50
11.67
10.00
Min
8.75
7.50
6.25
5.83
5.00
4.17
3.50
PCLK
1
80.00
60.00
50.00
40.00
35.00
30.00
25.00
20.00
17.50
15.00
10.00
13.33
11.67
8.75
7.50
6.67
5.83
5.00
4.17
Max
4-11
1