L64704 LSI Logic Corporation, L64704 Datasheet - Page 83
L64704
Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet
1.L64704.pdf
(220 pages)
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3.6.31
Group 4,
APR 36
External Output
Control Bits and
Reset Register
PWRP
Set to 0
I_FORMAT
This register contains the control bits for the external output pins
XCTR_OUT[3:0] and the bits that reset the demodulator and FEC
circuitry.
Read/Write: R/W
Reserved
XCTR[3:0]
Group 4 Registers
APR
36
D7
Reserved
PWRP Signal Invert
Set this bit to invert the polarity of the signal that is output
on the PWRP pin.
Set to 0
You must set these bits to 0 for normal operation
Input Format Selector
Program this bit to tell the L64704 the format of the
incoming data.
Reserved Bits
These bits are reserved for LSI Logic internal use only.
Reserved bits should always be set to 0, and will produce
random results when read.
External Control Output Bits
The value that you set on a bit in this field will appear on
the corresponding external output pin XCTR_OUT[3:0].
See
information.
D4
0
1
D0
0
1
D6
Section 5.9.2, “External Controls,”
PWRP Output Pin
Normal
Inverted
Input Format
RI and RQ in Offset Binary Format
RI and RQ in 2’s Complement Format
D5
D4
XCTR[3:0]
D3
D2
for more
DEMOD_
RST
D1
FEC_
RST
D0
[2:1]
[7:6]
[5:2]
3-51
3
0
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