L64704 LSI Logic Corporation, L64704 Datasheet - Page 78

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L64704

Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet

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3.6.27
Group 4,
APR 31, 32
Carrier
Synchronizer
Sweep Lower
Limit
3.6.28
Group 4,
APR 33
Carrier Loop
Configuration
Register
3-46
APR
33
CAR_SWP_
SWAP
D7
CAR_VCO_
You program the CAR_USWL and CAR_LSWL registers to set the upper
and lower limits, respectively, of the frequency sweep. For details, see
Section
Read/Write: R/W
Reserved
CAR_LSWL[13:0]
This register contains the various control bits that are used to configure
the Carrier Loop Synchronizer Loop logic. For more information, see
Section
Read/Write: R/W
CAR_SWP_SWAP
L64704 Registers
SWAP
APR
APR
31
32
D6
D7
D7
5.6.1.1, “Frequency Sweep Limits.”
5.6, “Carrier Synchronizer.”
CAR_VCO2
Reserved
N/P
D5
Reserved Bits
These bits are reserved for LSI Logic internal use only.
Reserved bits should always be set to 0, and will produce
random results when read.
Carrier Sweep Lower Sweep Limit
Program the CAR_LSWL register to set the lower limit of
the frequency sweep.
Swap Carrier Sweep Direction
Set this bit to control whether the carrier acquisition fre-
quency sweep direction is normal or reversed. It should
be toggled whenever the carrier sweep reaches its limit
D6
D6
CAR_VCO1
N/P
D4
D5
D5
CAR_OUT_
CAR_LSWL[7:0]
SEL
D4
D4
D3
CAR_LSWL[13:8]
CAR_PED_
D3
D3
SEL
D2
D2
D2
CAR_OPEN
D1
D1
D1
[5:0], [7:0]
CAR_SW
D0
D0
D0
[7:6]
7

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