L64704 LSI Logic Corporation, L64704 Datasheet - Page 181

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L64704

Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet

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A.1
Serial Bus
Protocol
Overview
Appendix A
Programming the
L64704 Using the Serial
Bus Protocol
This appendix discusses how to program the L64704 internal registers
and data tables in Serial Host Interface mode. This chapter is intended
primarily for system programmers who are developing software drivers
using the serial bus.
This chapter contains the following sections:
The multi-master serial bus interface has two one-bit lines – SDATA
(Serial Data) and D[0] (Serial Clock) – that are connected to the bus as
shown in
at a logic “1” value when the bus is not in operation.
Section A.1, “Serial Bus Protocol Overview,”
overview of the serial bus protocol.
Section A.2, “Programming the Slave Address Using the Serial Bus
Interface,”
Section A.3, “Write Cycle Using the Serial Bus Interface,”
example of a serial bus write cycle.
Section A.4, “Read Cycle Using the Serial Bus Interface,”
example of a serial bus read cycle.
Figure
shows how the slave address is formed and transmitted.
A.1. External pullup resistors are used to hold the bus
provides a high-level
shows an
shows an
A-1

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