L64704 LSI Logic Corporation, L64704 Datasheet - Page 46

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3-14
APR
0
VBER_IE
7
S3_LS_IE
AFC_LK_IE
This register diagram shows the bit organization of SMR[7:0]. Descrip-
tions of the fields follow the register diagram. The L64704 clears all bits
in the SMR to zero after a software or hardware reset.
VBER_IE
S3_LS_IE
L64704 Registers
6
S3_S_IE
5
Clock AFC Lock Detect Interrupt Enable
The microcontroller sets AFC_LK_IE to enable an
interrupt when Automatic Frequency Controller Lock is
detected. The L64704 always sets the AFC_LK bit in
STS[15:8] when this condition occurs.
Viterbi Bit Error Rate Monitor Interrupt Enable
The microcontroller sets VBER_IE to enable an interrupt
when the Viterbi decoder reaches the period specified by
VMDC2 (the period over which the Viterbi bit errors are
counted). The L64704 always sets the VBER bit in
STS[7:0] when this condition occurs.
Stage 3 Loss of Synchronization Interrupt Enable
The microcontroller sets S3_LS_IE to enable an interrupt
when Descrambler synchronization is lost.
AFC_LK_IE
0
1
VBER_IE
0
1
S3_LS_IE
0
1
S2_LS_IE
4
Definition
Disable Interrupt for Viterbi BER Count
Enable Interrupt for Viterbi BER Count
Definition
Disable Interrupt for Stage 3 Loss of
Synchronization
Enable Interrupt for Stage 3 Loss of
Synchronization
Definition
Disable Interrupt for AFC Lock Detect
Enable Interrupt for AFC Lock Detect
S2_S_IE
3
S1_LS_IE
2
S1_S_IE
1
Reserved
0
15
7
6