st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 117
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st7pmc2s6
Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
1.ST7PMC2S6.pdf
(371 pages)
- Current page: 117 of 371
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ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Note:
There is a locking mechanism for transferring the OCiR value to the buffer. After a write to
the OCiHR register, transfer of the new compare value to the buffer is inhibited until OCiLR
is also written.
Unlike in output compare mode, the compare function is always enabled in PWM mode.
Procedure
To use pulse width modulation mode:
1.
2.
3.
4.
Figure 53. Pulse width modulation cycle
If OLVL = 1 and OLVL2 = 0 the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1 = OLVL2 a continuous signal is seen on the OCMP1 pin.
Load the OC2R register with the value corresponding to the period of the signal using
the formula in the opposite column.
Load the OC1R register with the value corresponding to the period of the pulse if
(OLVL1 = 0 and OLVL2 = 1) using
Select the following in the CR1 register:
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC2R register.
Select the following in the CR2 register:
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0]) (see
= OC1R
= OC2R
counter
counter
When
When
Pulse width modulation cycle
Equation
Table
OCMP1 = OLVL2
OCMP1 = OLVL1
51).
Counter is reset
5.
ICF1 bit is set
to FFFCh
On-chip peripherals
117/371
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