st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 87

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
Figure 30. Watchdog block diagram
Watchdog window register (WDGWR)
Reset
W6
-
W5
W2
W4
W3
W1
W0
Comparator = 1
when T6:0 > W6:0
CMP
Write WDGCR
Watchdog control register (WDGCR)
WDGA
T1
T0
T6
T5
T2
T4
T3
6-bit downcounter (CNT)
MCC/RTC
f
Div 64
OSC2
WDG prescaler Div 4
12-bit MCC
RTC counter
TB[1:0] bits
MSB
LSB
(MCCSR
0
6
11
5
register)
The application program must write in the WDGCR register at regular intervals during
normal operation to prevent an MCU reset. This operation must occur only when the counter
value is lower than the window register value. The value to be stored in the WDGCR register
must be between FFh and C0h (see
Figure
31).
Enabling the watchdog
When software watchdog is selected (by option byte), the watchdog is disabled after a reset.
It is enabled by setting the WDGA bit in the WDGCR register, then it cannot be disabled
again except by a reset.
When hardware watchdog is selected (by option byte), the watchdog is always active and
the WDGA bit is not used.
Controlling the downcounter
This downcounter is free-running and counts down even if the watchdog is disabled. When
the watchdog is enabled, the T6 bit must be set to prevent generating an immediate reset.
The T[5:0] bits contain the number of increments which represent the time delay before the
watchdog produces a reset (see
Figure 31: Approximate timeout
duration). The timing
varies between a minimum and a maximum value due to the unknown status of the
prescaler when writing to the WDGCR register (see
Figure
32).
The window register (WDGWR) contains the high limit of the window: To prevent a reset, the
downcounter must be reloaded when its value is lower than the window register value and
greater than 3Fh.
Figure 33
describes the window watchdog process.
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