st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 357

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Table 227. Option byte 0 (continued)
1. Even if PLL clock is selected, a clock signal must always be present (refer to
Table 228. Option byte 1
OPT4:3
OPT7:5
OPT4:2
OPT1:0
OPT2
OPT1
OPT0
block diagram on page
Bit
Bit
PKG[2:0]
FMP_R
VD[1:0]
Name
Name
RSTC
MCO
DIV2
-
Voltage detection
Reset clock cycle selection
Divider by 2
Flash memory read-out protection
Package selection
Reserved
Motor control output options
43).
These option bits enable the voltage detection block (LVD, and AVD):
00: Selected low voltage detector = LVD and AVD on
01: Selected low voltage detector = LVD on and AVD off
10: Selected low voltage detector = LVD and AVD off
11: Selected low voltage detector = LVD and AVD off
This option bit selects the number of CPU cycles applied during the reset phase and
when exiting Halt mode. For resonator oscillators, it is advised to select 4096 due to the
long crystal stabilization time.
0: Reset phase with 4096 CPU cycles
1: Reset phase with 256 CPU cycles
Note: When the PLL clock is selected (CKSEL = 0), the reset clock cycle selection is
forced to 4096 CPU cycles.
1: DIV2 divider disabled with OSC1 (or OSCIN) = 8 MHz
0: DIV2 divider enabled (in order to have 8 MHz required for the PLL with OSC1 (or
Readout protection, when selected provides a protection against program memory
content extraction and against write access to Flash memory. This protection is based
on a read/write protection of the memory in test modes and ICP mode. Erasing the
option bytes when the FMP_R option is selected causes the whole user memory to be
erased first and the device can be reprogrammed. Refer to the ST7 Flash
Programming Reference Manual and
for more details.
0: Read-out protection enabled
1: Read-out protection disabled
These option bits are used to select the device package:
000: Selected package = LQFP32
001: Selected package = LQFP44
011: Reserved
1xx: Reserved
MCO port under reset:
00: Motor control output = HiZ
01: Motor control output = Low
10: Motor control output = High
11: Motor control output = HiZ
OSCIN) = 16 MHz))
Function
Function
Section 4.3.1: Read-out protection on page 34
Figure 9: Clock, reset and supply
ST7MCxxx-Auto device
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