st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 56

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

Supply, reset and clock management
6.6.6
6.6.7
56/371
Interrupts
The MCC/RTC interrupt event generates an interrupt if the OIE bit of the MCCSR register is
set and the interrupt mask in the CC register is not active (RIM instruction).
Table 12.
1. The MCC/RTC interrupt wakes up the MCU from Active Halt mode, not from Halt mode.
MCC control status register (MCCSR)
Table 13.
Time base overflow event
MCCSR
6:5 CP[1:0]
Bit Name
7
4
MCO
R/W
7
Interrupt event
MCO
SMS
MCC/RTC interrupt control/wake-up capability
MCCSR register description
Main clock out selection
CPU clock prescaler
Slow mode select
This bit enables the MCO alternate function on the PF0 I/O port. It is set and cleared
by software.
0: MCO alternate function disabled (I/O pin free for general-purpose I/O)
1: MCO alternate function enabled (f
Note: To reduce power consumption, the MCO function is not active in Active Halt
mode.
These bits select the CPU clock prescaler which is applied in the different slow
modes. Their action is conditioned by the setting of the SMS bit. These two bits are
set and cleared by software:
00: f
01: f
10: f
11: f
This bit is set and cleared by software.
0: Normal mode. f
1: Slow mode. f
See
clock and beeper (MCC/RTC)
6
CPU
CPU
CPU
CPU
Section 8.2: Slow mode
CP[1:0]
R/W
in slow mode = f
in slow mode = f
in slow mode = f
in slow mode = f
Event flag
5
CPU
OIF
CPU
is given by CP1, CP0
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto,
= f
OSC2
SMS
OSC2
OSC2
OSC2
OSC2
R/W
4
Enable control bit Exit from WAIT Exit from HALT
and
/2
/4
/8
/16
for more details.
Section 6.6: Main clock controller with real time
OIE
Function
OSC2
3
on I/O port)
TB[1:0]
R/W
2
Reset value: 0000 0000 (00h)
Yes
R/W
OIE
1
No
(1)
R/W
OIF
0