st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 46

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
Supply, reset and clock management
6.4.3
6.4.4
6.4.5
46/371
Figure 11. Reset block diagram
1. See
The RESET pin is an asynchronous signal which plays a major role in EMS performance. In
a noisy environment, it is recommended to follow the guidelines mentioned in the electrical
characteristics section.
External power-on reset
If the LVD is disabled by option byte, to start up the microcontroller correctly, the user must
ensure by means of an external reset circuit that the reset signal is held low until V
the minimum level specified for the selected f
A proper reset signal for a slow rising V
RC network connected to the RESET pin.
Internal low voltage detector (LVD) reset
Two different reset sequences caused by the internal LVD circuitry can be distinguished:
The device RESET pin acts as an output that is pulled low when V
V
The LVD filters spikes on V
Internal watchdog reset
The RESET sequence generated by a internal watchdog counter overflow is shown in
Figure
Starting from the Watchdog counter underflow, the device RESET pin acts as an output that
is pulled low during at least t
DD
< V
Power-on reset
Voltage drop reset
Reset
Section 11.2.2: Illegal opcode reset on page 309
12.
IT-
(falling edge) as shown in
V
DD
R
DD
ON
w(RSTL)out
larger than t
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto,
Figure
Filter
.
DD
g(VDD)
supply can generally be provided by an external
12.
generator
OSC
Pulse
for more details on illegal opcode reset conditions.
to avoid parasitic resets.
frequency.
DD
Watchdog reset
Illegal opcode reset
LVD reset
< V
IT+
Internal
(rising edge) or
reset
DD
is over
1)

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