st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 88

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
Note:
10.1.4
10.1.5
Caution:
88/371
The T6 bit can be used to generate a software reset (the WDGA bit is set and the T6 bit is
cleared).
Watchdog reset on HALT option
If the watchdog is activated and the watchdog reset on halt option is selected, then the HALT
instruction generates a reset.
Using Halt mode with the watchdog
If Halt mode with watchdog is enabled by option byte (no watchdog reset on HALT
instruction), it is recommended before executing the HALT instruction to refresh the WDG
counter, to avoid an unexpected WDG reset immediately after waking up the microcontroller.
How to program the watchdog timeout
Figure 31
counter (CNT) and the resulting timeout duration in milliseconds. This can be used for a
quick calculation without taking the timing variations into account. If more precision is
needed, use the formulae in
When writing to the WDGCR register, always write 1 in the T6 bit to avoid generating an
immediate reset.
Figure 31. Approximate timeout duration
shows the linear relationship between the 6-bit value to be loaded in the watchdog
3F
38
30
28
20
18
10
08
00
1.5
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
18
Figure
34
Watchdog timeout (ms) @ 8 MHz fOSC2
32.
50
65
82
98
114
128

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