st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 90

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
10.1.6
10.1.7
90/371
Figure 33. Window watchdog timing diagram
Low power modes
Table 34.
Hardware watchdog option
If Hardware watchdog is selected by option byte, the watchdog is always active and the
WDGA bit in the WDGCR is not used. Refer to
Slow
Wait
Halt
Active Halt
Mode
No effect on watchdog. The downcounter continues to decrement at normal speed.
No effect on watchdog. The downcounter continues to decrement.
OIE bit in
Effect of low power modes on window watchdog
MCCSR
T[5:0] CNT downcounter
register
WDGWR
0
0
1
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Reset
3Fh
T6 bit
Refresh not allowed
WDGHALT
option byte
bit in
0
1
x
No watchdog reset is generated. The MCU enters Halt mode.
The watchdog counter is decremented once and then stops
counting and is no longer able to generate a watchdog reset
until the MCU receives an external interrupt or a reset.
If an interrupt is received (refer to
to see interrupts which can occur in Halt mode), the watchdog
restarts counting after 256 or 4096 CPU clocks. If a reset is
generated, the watchdog is disabled (reset state) unless
hardware watchdog is selected by option byte. For application
recommendations see
A reset is generated instead of entering Halt mode.
No reset is generated. The MCU enters Active Halt mode. The
watchdog counter is not decremented. It stops counting.
When the MCU receives an oscillator interrupt or external
interrupt, the watchdog restarts counting immediately. When
the MCU receives a reset the watchdog restarts counting after
256 or 4096 CPU clocks.
Refresh window
Description
Section 14.1: Flash option
Section 10.1.8
(step = 16384/f
time
Table 22: Interrupt mapping
below.
OSC2
bytes.
)