st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 267

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Table 127. Output configuration summary
1. When clocks are disabled (CKE bit reset) while outputs are enabled (MOE bit set), the effects on the MCOx
2. “Peripheral frozen” configuration is not recommended, as the peripheral may be stopped in an unknown
3. In direct access mode (DAC = 1), when CKE = 0 (peripheral clock disabled) only logical level can be
Table 128. Sensor mode selection
Table 129. DAC bit meaning
Table 130. Multiplier result
CKE bit MOE bit DAC bit Peripheral clock
SR bit
outputs where PWM signal is applied depend on the running mode selected:
- In voltage mode (VOC1 bit = 0), the MCOx outputs where PWM signal is applied stay at level 1.
- In current mode (VOC1 bit = 1), the MCOx outputs where PWM signal is applied are put to level 0.
In all cases, MCOx outputs where a level 1 was applied before disabling the clocks stay at level 1. That is
why it is recommended to disable the MCOx outputs (reset MOE bit) before disabling the clocks. This puts
all the MCOx outputs under reset state defined by the corresponding option bit.
Effect on PWM generator: The PWM generator 12-bit counter is reset as soon as CKE = 0. This ensures
that the PWM signals start properly in all cases. When these bits are set, all registers with preload on
update event are transferred to active registers.
state (depending on PWM generator outputs,etc.). It is better practice to exit from run mode by first setting
output state (by toggling either MOE or DAC bits) and then to disabling the clock if needed.
applied on the MCOx outputs when they are enabled whereas when CKE = 1 (peripheral clock enabled), a
PWM signal can be applied on them. Refer to
0
1
MOE bit
DCB bit
0
0
0
1
1
1
0
1
1
0
1
Sensors not used OS[2:0] bits enabled
Sensors used
0
1
1
0
1
1
Mode
DAC bit
0
1
x
0
1
0
1
x
x
OS1 disabled
OS[2:0] bits
Reset state depending on the option bit
Standard running mode
MPHST register value (depending on MPOL, MPAR register values
and PWM setting) (see
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
MCOMP = MWGHT x MZREG/256
MCOMP = MWGHT x MZPRV/256
Table 155: Deadtime generator set-up on page 281.
Commutation delay
Reset state
Peripheral frozen
Direct access via MPHST (only logical level)
Reset state
Standard running mode.
Direct access via MPHST (PWM can be applied)
(1)
Table
Effect on output
‘Between C
‘Between D and Z’ behavior and
‘Between Z and C
‘Between Z and C
Behavior of the output PWM
‘Between C
155)
Effect on MCOx output
(2)
n
and Z’ behavior and
n
and D’ behavior,
On-chip peripherals
n+1
n+1
’ behavior
’ behavior
267/371
(3)
(3)