st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 206

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
206/371
3
4
is reset (sampling at PWM frequency) then, depending on the state of the ZSV bit in the
MSCR register, Z event sampling can run or be stopped (and D event is sampled).
When BEMF sampling is performed at the end of the PWM signal off-time, the inputs in
OFF-state are grounded or put in HiZ as selected by the DISS bit in the MSCR register.
The ZEF[3:0] event counter in the MZFR register is active in all configurations.
Figure 87. Sampling during ON time at f
Commutation noise filter
For D event detection and for Z event detection (when SPLG bit is set while DS[3:0] bits are
reset), sampling is done at f
page
filter of 1µs (for f
been implemented. This means that, with sampling at 1MHz (1µs), due to this filter, 1
sample are ignored directly after the commutation.
This filter is active all the time for the D event and it is active for the Z event when the SPLG
bit is set and DS[3:0] bits are cleared (meaning that the Z event is sampled at high
frequency during the PWM ON or OFF time).
203). To avoid any erroneous detection due to PWM commutation noise, an hardware
PWM signal
PERIPH
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
= 4 MHz) when PWM is put ON and when PWM is put OFF has
PWM OFF state
SCF
DS[3:0]
during the PWM ON or OFF time
f
SCF
during on time
SCF
Current sample
DS[3:0]
(Sampling block on

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