st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 171

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Table 68.
1. Bits 7:4 have the same function as in SCI mode, please refer to
SCI control register 1 (SCICR1)
Table 69.
Bit Name
Bit Name
SCICR1
2
1
0
7
6
5
R/W
R8
7
SCID
NF
PE
FE
R8
T8
Noise flag
Framing error
Parity error
Receive data bit 8
Transmit data bit 8
Disabled for low power consumption
SCISR register description
SCICR1 register description
In LIN master mode (LINE bit = 1 and LSLV bit = 0) this bit has the same function as in
SCI mode, please refer to
In LIN slave mode (LINE bit = 1 and LSLV bit = 1) this bit has no meaning.
In LIN slave mode, this bit is set only when a real framing error is detected (if the stop
bit is dominant (0) and at least one of the other bits is recessive (1). It is not set when
a break occurs, the LHDF bit is used instead as a break flag (if the LHDM bit = 0). It is
cleared by a software sequence (an access to the SCISR register followed by a read
to the SCIDR register).
0: No framing error
1: Framing error detected
This bit is set by hardware when a LIN parity error occurs (if the PCE bit is set) in
receiver mode. It is cleared by a software sequence (a read to the status register
followed by an access to the SCIDR data register). An interrupt is generated if PIE = 1
in the SCICR1 register.
0: No LIN parity error
1: LIN parity error detected
This bit is used to store the 9th bit of the received word when M = 1.
This bit is used to store the 9th bit of the transmitted word when M = 1.
When this bit is set the SCI prescalers and outputs are stopped and the end of the
current byte transfer in order to reduce power consumption.This bit is set and cleared
by software.
0: SCI enabled
1: SCI prescaler and outputs disabled
R/W
T8
6
SCID
R/W
5
SCI status register (SCISR) on page
R/W
M
4
(1)
(1)
(continued)
Function
Function
WAKE
R/W
3
SCI status register (SCISR) on page
PCE
R/W
2
Reset value: x000 0000 (x0h)
Reserved
On-chip peripherals
152.
1
-
R/W
152.
PIE
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0