st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 61

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Note:
7.2.2
7.2.3
1
2
Figure 17. Priority decision process
When an interrupt request is not serviced immediately, it is latched and then processed
when its software priority combined with the hardware priority becomes the highest one.
The hardware priority is exclusive while the software one is not. This allows the previous
process to succeed with only one interrupt.
Reset, TRAP and MCES can be considered as having the highest software priority in the
decision process.
Different interrupt vector sources
Two interrupt source types are managed by the ST7 interrupt controller: the non-maskable
type (reset, TRAP) and the maskable type (external or from internal peripherals).
Non-maskable sources
These sources are processed regardless of the state of the I1 and I0 bits of the CC register
(see
corresponding vector is loaded in the PC register and the I1 and I0 bits of the CC are set to
disable interrupts (level 3). These sources allow the processor to exit Halt mode.
TRAP (non maskable software interrupt)
This software interrupt is serviced when the TRAP instruction is executed. It is serviced
according to the flowchart in
Reset
The reset source has the highest priority in the ST7. This means that the first current
routine has the highest software priority (level 3) and the highest hardware priority.
See
Figure
Section 6.4: Reset sequence manager (RSM)
16). After stacking the PC, X, A and CC registers (except for reset), the
Highest hardware
priority serviced
Same
Figure 16
interrupts
Pending
Software
as a MCES top level interrupt.
priority
Highest software
priority serviced
for more details.
Different
Interrupts
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