st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 222

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
Figure 96. Simulated demagnetization/zero-crossing event generation
When using hardware commutation C
and the value written in the registers are checked at different times.
If SDM bit is set, meaning simulated demagnetization, a value must be written in the MDREG register to
generate the simulated demagnetization. This value must be written after the C (either C
preceding the simulated demagnetization.
If SZ bit is set, meaning simulated zero-crossing event, a value must be written in the MZREG register to
generate the simulated zero-crossing. This value must be written after the D event (D
the simulated zero-crossing.
When using simulated commutation (C
manager is not taken in account and must be overwritten if the SC bit has been set in a Z event interrupt
and the sequence of events is broken meaning that several consecutive simulated commutations can be
implemented.
As soon as the SC bit is set in the MCRC register, the system won’t necessarily expect a D event after a
C event. This can be used for an application in sensor mode with only one hall effect sensor for example.
Be careful that the D and Z events are not ignored by the peripheral, this means that for example if a Z
event occurs, the MTIM timer is reset. In simulated commutation mode, the sequence D -> Z is expected,
and this order must be respected.
As the sequence of events may not be the same when using simulated commutation, as soon as the SC
bit is set, the capture/compare feature and protection on MCOMP register is reestablished only after a
write to the MCOMP register. This means that as soon as the SC bit is set, if no write access is done to
the MCOMP register, no commutation event is generated, whatever the value of MCOMP compared to
MTIM at the time SC is set. This does not depend on the running mode: switched or autoswitched mode
(SWA bit). If software commutation event is used with a normal sequence of events C-->D-->Z, it is
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During C interrupt
simulated or hardware D/Z events
value written in MDREG/MZREG
simulated event generation
Z
H
After C interrupt
MDREG value checked. If
MDREG
immediate D
C
H
<=
MTIM
S
D
generation
S
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
H
Z
, the sequence of events needed is C
S
H
), the result of the 8*8 hardware multiplication of the delay
C
H
After D interrupt
MZREG value checked. If
MZREG
immediate Z
D
H
<=
MTIM
S
generation
Z
S
Z
D
Z
C
C
S
H
S
H
H
Simulated zero-crossing
Simulated demagnetization
Hardware zero-crossing
Hardware commutation
H
(SC = 0)
then D and finally Z events
D
S
H
or D
s
or C
S
) preceding
H
Z
) event
S
t