st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 120

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
120/371
Table 50.
Bit Name
7
6
5
4
3
2
1
0
FOLV2
FOLV1
OLVL2
IEDG1
OLVL1
OCIE
TOIE
ICIE
Input capture interrupt enable
Output compare interrupt enable
Timer overflow interrupt enable
Forced output compare 2
Forced output compare 1
Output level 2
Input edge 1
Output level 1
CR1 register description
0: Interrupt is inhibited
1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is
0: Interrupt is inhibited
1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register is
0: Interrupt is inhibited
1: A timer interrupt is enabled whenever the TOF bit of the SR register is set
This bit is set and cleared by software.
0: No effect on the OCMP2 pin
1: Forces the OLVL2 bit to be copied to the OCMP2 pin, if the OC2E bit is set and
This bit is set and cleared by software.
0: No effect on the OCMP1 pin
1: Forces OLVL1 to be copied to the OCMP1 pin, if the OC1E bit is set and even if
This bit is copied to the OCMP2 pin whenever a successful comparison occurs with
the OC2R register and OCxE is set in the CR2 register. This value is copied to the
OCMP1 pin in one pulse mode and pulse width modulation mode.
This bit determines which type of level transition on the ICAP1 pin triggers the
capture.
0: A falling edge triggers the capture
1: A rising edge triggers the capture
The OLVL1 bit is copied to the OCMP1 pin whenever a successful comparison occurs
with the OC1R register and the OC1E bit is set in the CR2 register.
set
set
even if there is no successful comparison
there is no successful comparison
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Function

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