st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 215

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
prescaler contents can be incremented/decremented at the next commutation event by setting the RMI
(decrement) or RPI (increment) bits in the MISR register. When this method is used, at the next
commutation event the prescaler value is updated but also all the MTIM timer-related registers are shifted
in the appropriate direction to keep their value. After it has been taken into account, (at commutation) the
RPI or RMI bit is reset by hardware. See
Only one update per step is allowed, so if both RPI and RMI bits are set simultaneously by software,
there is no effect on the MISR register: the write access to these two bits together is not taken into
account and the previous state is upheld. This means that if either RPI or RMI bits were set before the
write access of both bits at the same time, this bit (RPI or RMI) is kept at 1. If neither bit was set before
the simultaneous write access, neither of them are set after the write access.
In switched mode, BEMF and demagnetization detection are already possible in order to pass in
autoswitched mode as soon as possible but Z and D events do not affect the timer contents.
In this mode, if an MTIM overflow occurs, it restarts counting from 0x00h and the OI overflow flag in the
MCRC register is set if the TES[1:0] bits = 00.
Caution:
Table 96.
x
Switched
Autoswitched
Speed measure 01 10 11
Mode
In this mode, MCOMP must never be written to 0.
Step update
TES[1:0]
00
00
xx
CKE
bit
1
0
1
1
SWA
bit
x
0
1
x
Disabled
Enabled
Enabled
Enabled
Clock
state
Table
96.
Read
Set RPI bit in the MISR
register until next
commutation
Write the ST[3:0] value directly in the MPRSR register
Automatically updated according to MZREG value
Ratio increment
(slow down)
Set RMI bit in the MISR
register until next
commutation
On-chip peripherals
Ratio decrement
(speed up)
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