st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 78

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
I/O ports
9
9.1
9.2
9.2.1
Note:
78/371
1
2
3
I/O ports
Introduction
The I/O ports offer different functional modes:
An I/O port contains up to eight pins. Each pin can be programmed independently as digital
input (with or without interrupt generation) or digital output.
Functional description
Each port has two main registers:
and one optional register:
Each I/O pin may be programmed using the corresponding register bits in the DDR and OR
registers: Bit X corresponding to pin X of the port. The same correspondence is used for the
DR register.
The following description takes into account the OR register, (for specific ports which do not
provide this register refer to
diagram is shown in
Input modes
The input configuration is selected by clearing the corresponding DDR register bit. In this
case, reading the DR register returns the digital value applied to the external I/O pin.
Different input modes can be selected by software through the OR register.
Writing the DR register modifies the latch value but does not affect the pin status.
When switching from input to output mode, the DR register has to be written first to drive the
correct level on the pin as soon as the port is configured as an output.
Do not use read/modify/write instructions (BSET or BRES) to modify the DR register as this
might corrupt the DR content for I/Os configured as input.
External interrupt function
When an I/O is configured as input with interrupt, an event on this I/O can generate an
external interrupt request to the CPU.
Each pin can independently generate an interrupt request. The interrupt sensitivity is
independently programmable using the sensitivity bits in the EICR register.
Each external interrupt vector is linked to a dedicated group of I/O port pins (see
Pin description
transfer of data through digital inputs and outputs and for specific pins,
external interrupt generation,
alternate signal input/output for the on-chip peripherals.
Data register (DR)
Data direction register (DDR)
Option register (OR)
and
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Section 7:
Figure
28.
Section 9.3: I/O port
Interrupts). If several input pins are selected simultaneously
implementation). The generic I/O block
Section 2:

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