st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 165

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Note:
Figure 69. LIN synch field measurement
LIN baud rate
Baud rate programming is done by writing a value in the LPR prescaler or performing an
automatic resynchronization as described below.
Automatic resynchronization
To automatically adjust the baud rate based on measurement of the LIN synch field:
When auto synchronization is enabled, after each LIN synch break, the time duration
between five falling edges on RDI is sampled on f
stored in an internal 15-bit register called SM (not user accessible) (see
the LDIV value (and its associated LPFR and LPR registers) are automatically updated at
the end of the fifth falling edge. During LIN synch field measurement, the SCI state machine
is stopped and no data is transferred to the data register.
LIN slave baud rate generation
In LIN mode, transmission and reception are driven by the LIN baud rate generator.
LIN master mode uses the extended or conventional prescaler register to generate the baud
rate.
If LINE bit = 1 and LSLV bit = 1 then the conventional and extended baud rate generators
are disabled. Thus, the baud rate for the receiver and transmitter are both set to the same
value, which depends on the LIN Slave baud rate generator:
Equation 9
where
LDIV is an unsigned fixed point number. The mantissa is coded on 8 bits in the LPR register
and the fraction is coded on 4 bits in the LPFR register.
If LASE bit = 1 then LDIV is automatically updated at the end of each LIN synch field.
Write the nominal LIN prescaler value (usually depending on the nominal baud rate) in
the LPFR/LPR registers.
Set the LASE bit to enable the auto synchronization unit.
t
t
SM = Synch measurement register (15 bits)
t
CPU
BR
BR
Tx = Rx =
LIN synch break
= Baud rate period
= 16.LP.t
= CPU period
CPU
(16
f
CPU
*
LDIV)
Extra
’1’
Start
bit
t
BR
LPR = t
Bit 0 Bit 1
Measurement = 8.T
LPR(n)
BR
/(16.t
Bit 2
CPU
LIN synch field
) = rounding (SM/128)
Bit 3 Bit 4
BR
CPU
= SM.t
and the result of this measurement is
CPU
Bit 5 Bit 6 Bit 7
Stop
On-chip peripherals
bit
Figure
LPR(n+1)
Next
start
bit
69). Then
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