pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 108
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 108 of 401
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4.0 Embedded Controller Modules
Pending Register (WKPND2)
Byte-wide read/write register that latches the occurrence of a selected trigger condition associated with the input signals
WUI20 to WUI27. For a detailed description of the register see the description of the WKPND1 register, above.
Location: 00 FFCC
Type:
Pending Register (WKPND3)
Byte-wide read/write register that latches the occurrence of a selected trigger condition associated with the input signals
WUI30 to WUI37. For a detailed description of the register see the description of the WKPND1 register, above.
Location: 00 FFD0
Type:
Pending Register (WKPND4)
Byte-wide read/write register that latches the occurrence of a selected trigger condition associated with the input signals
WUI40 to WUI47. For a detailed description of the register see the description of the WKPND1 register, above.
Location: 00 FFD4
Type:
Enable Register (WKEN1)
Byte-wide read/write register that enables the wake-up function of the associated input signal, WUI10 to WUI17. On reset,
WDENA1 is cleared (0); this disables the associated input signals. The WKENA1 register format is shown below:
Location: 00 FFD8
Type:
Enable Register (WKEN2)
Byte-wide read/write register that enables the wake-up function of the associated input signal, WUI20 to WUI27. For a de-
tailed description of the register, see the description of the WKEN1 register, above.
Location: 00 FFDA
Type:
Enable Register (WKEN3)
Byte-wide read/write register that enables the wake-up function of the associated input signal, WUI30 to WUI37. For a de-
tailed description of the register, see the description of the WKEN1 register, above.
Location: 00 FFDC
Type:
Enable Register (WKEN4)
Byte-wide read/write register that enables the wake-up function of the associated input signal, WUI40 to WUI47. For a de-
tailed description of the register, see the description of the WKEN1 register, above.
Location: 00 FFDE
Type:
Bit
Name
Reset
7-0
Bit
Wake-Up Enable. If set (1), a valid trigger condition on the associated input generates a wake-up signal or
EXTINTx interrupt request.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
16
16
16
16
16
16
7
0
16
6
0
5
0
(Continued)
WKEN17-WKEN10
Description
108
4
0
3
0
2
0
1
0
0
0
Revision 1.2
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