pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 278

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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5.0 Host Controller Interface Module
Core to SIB Modules Access Enable Register (CRSMAE)
This register enables core access to the Host-Controlled modules. Only one of the bits in this register may be set at a time.
Location: 00 FCE8
Type:
Bit
Name
Reset
Bit
Name
Reset
15-9
7-2
Bit
0
1
8
CFGAE (Configuration Register Core Access Enable). This bit enables access to the PnP Configuration
Index/Data registers, with A0 of the offset used to differentiate between them. When A0 is 0, the Index register
is accessed; when A0 is 1, the Data register is accessed.
0: Core access to the Configuration registers is disabled (default)
1: Core access to the Configuration registers is enabled
RTCAE (Real-Time Clock (RTC) Core Access Enable). The RTC has two chip-select signals defined in its
configuration space, each with two registers. A1 of the offset is used to differentiate between the two (when A1
is 0, the pair pointed to by index 60, 61 is accessed; when A1 is 1, the pair pointed to by index 62, 63 is
accessed).
0: Core access to the RTC registers is disabled (default)
1: Core access to the RTC registers is enabled
Reserved.
MSWCAE (Mobile System Wake-Up Control (MSWC) Access Enable).
0: Core access to the MSWC registers is disabled (default)
1: Core access to the MSWC registers is enabled
Reserved.
R/W
15
16
7
0
0
14
6
0
0
13
5
0
0
Reserved
(Continued)
Reserved
Description
278
12
4
0
0
11
3
0
0
10
2
0
0
RTCAE
1
0
9
0
MSWCAE
CFGAE
0
0
8
0
Revision 1.2