pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 9

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
Table of Contents
4.4
4.5
4.3.2
4.3.3
4.3.4
4.3.5
MULTI-INPUT WAKE-UP (MIWU) ........................................................................................... 103
4.4.1
4.4.2
4.4.3
4.4.4
GENERAL-PURPOSE I/O (GPIO) PORTS ............................................................................. 110
4.5.1
Non-Maskable Interrupt (NMI) ..................................................................................... 96
Maskable Interrupts ..................................................................................................... 96
ICU Registers .............................................................................................................. 99
Usage Hints ............................................................................................................... 102
Features .................................................................................................................... 103
Operation ................................................................................................................... 103
MIWU Registers ........................................................................................................ 106
Usage Hints ............................................................................................................... 109
Features ................................................................................................................... 110
(Continued)
External NMI Inputs ................................................................................................ 96
Non-Maskable Interrupt Processing ....................................................................... 96
PFAIL Input ............................................................................................................ 96
Maskable Interrupt Vectors .................................................................................... 97
Pending Interrupts .................................................................................................. 97
Interrupt Priorities ................................................................................................... 97
Power-Down Modes ............................................................................................... 97
External Interrupt Inputs ......................................................................................... 97
Interrupt Assignment .............................................................................................. 97
ICU Register Map ................................................................................................... 99
Interrupt Vector Register (IVCT) ............................................................................. 99
NMI Status Register (NMISTAT) ............................................................................ 99
Power Fail Interrupt Control and Status Register (PFAIL) ................................... 100
Interrupt Status Register 0 (ISTAT0) .................................................................... 100
Interrupt Status Register 1 (ISTAT1) .................................................................... 101
Interrupt Enable and Mask Register 0 (IENAM0) ................................................. 101
Interrupt Enable and Mask Register 1 (IENAM1) ................................................. 101
Edge Interrupt Clear Register 0 (IECLR0) ............................................................ 102
Edge Interrupt Clear Register 1 (IECLR1) ............................................................ 102
Initializing .............................................................................................................. 102
Clearing ................................................................................................................ 102
Nesting ................................................................................................................. 102
MIWU Register Map ............................................................................................. 106
Edge Detection Register (WKEDG1) ................................................................... 107
Edge Detection Register (WKEDG2) ................................................................... 107
Edge Detection Register (WKEDG3) ................................................................... 107
Edge Detection Register (WKEDG4) ................................................................... 107
Pending Register (WKPND1) ............................................................................... 107
Pending Register (WKPND2) ............................................................................... 108
Pending Register (WKPND3) ............................................................................... 108
Pending Register (WKPND4) ............................................................................... 108
Enable Register (WKEN1) .................................................................................... 108
Enable Register (WKEN2) .................................................................................... 108
Enable Register (WKEN3) .................................................................................... 108
Enable Register (WKEN4) .................................................................................... 108
Pending Clear Register (WKPCL1) ...................................................................... 109
Pending Clear Register (WKPCL2) ...................................................................... 109
Pending Clear Register (WKPCL3) ...................................................................... 109
Pending Clear Register (WKPCL4) ...................................................................... 109
GPIO Port Functionality ........................................................................................ 110
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