pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 76

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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4.0 Embedded Controller Modules
Note: References to SZCFGn also apply to the IOCFG register.
RD: active
HOLD field in SZCFGn reg. = 0
WAIT field in SZCFGn reg.
Core attempts to read a word
In SZCFGn reg.: {BW,WBR,BRE} = 001
T2B
TIW
References to SELn also apply to the SELIO signal.
TBW and T2B states do not exist in bus cycles of the IO zone.
Internal waits completed
Next address on A0-19;
End of T2B: Data sampled.
Core attempts to read a word
Internal waits corresponding to WAIT field in SZCFGn register.
BW = 0; {WBR,BRE} = 11;
Next address
HOLD field in SZCFGn reg.
on A0-19
0
In SZCFGn reg.:
Figure 19. Normal Read Bus Cycle
TBW
(Continued)
begin
T2
T1
0
76
In SZCFGn reg.: HOLD
end
Address placed on A0-20;
SELn: activated.
RD: active;
End of T2: Data is sampled.
{BW = 1 or BRE = 0
or core attempts to read a byte}
T
hold
Hold cycles completed
First T
Hold cycles according
to HOLD field in SZCFGn reg.
and RD are deactivated
Address on A0-20 invalid/changed;
SELn and RD: inactive.
hold
WAIT field in SZCFGn reg. = 0
: SELn
0
Other SZCFGn
configuration
Revision 1.2