pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 246

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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5.0 Host Controller Interface Modules
Status Register (STATUS, Legacy 64
This register provides the status of the host interface keyboard channel buffers (DBBIN and DBBOUT) and the value of mes-
sages sent by the core using the Status bits to the host. The Status register can also be read by the core as HIKMST. The
Status register is cleared (00
Type:
Data In Buffer Register (DBBIN, Legacy 60
This register allows the host to write to DBBIN register while setting Status register bit IBF and clearing Status register bit
A2 bit. If the core interrupt on IBF is enabled (IBFCIE in HICTRL register is set to 1), writing to this register asserts it (high).
Location: As defined in LDN 06
Type:
Command In Buffer Register (COMAND, Legacy 64
This register allows the host to write to DBBIN register while setting IBF and A2 bits in the Status register. If the core interrupt
on IBF is enabled (IBFCIE in HICTRL register is set to 1), writing to Data In Buffer asserts it (high).
Location: As defined in LDN 06
Type:
Bit
Name
Reset
Bit
Name
Bit
Name
Location: As defined in LDN 06
7-4
7-0
7-0
Bit
Bit
Bit
0
1
2
3
OBF (Output Buffer Full). This bit is set when the keyboard/mouse channel’s DBBOUT is written by the core
(i.e., writing to HIKDO or HIMDO registers). The bit is cleared by a host processor read from the
keyboard/mouse channel output buffer (60
IBF (Input Buffer Full). This bit is set when the keyboard/mouse channel’s DBBIN is written by the host
processor (i.e., writing to either address 60
reads the input buffer (HIKMDI).
F0 (Flag 0). A general-purpose flag that can be set or cleared by the core firmware.
A2 (A2 Address). Holds the value of the A2 signal in the last write operation of the host to the keyboard/mouse
channel’s input buffer (i.e., A2=0 for Data In Buffer write and A2=1 for Command In Buffer write).
ST3-ST0 (Status). Four general-purpose flags that can be set or cleared by the core firmware.
Keyboard/Mouse DBBIN Data.
Keyboard/Mouse DBBIN Data.
R
W
W
7
0
7
7
16
) on reset.
16
16
16
6
0
6
6
registers, index 62
registers, index 60
registers, index 62
ST3-ST0
16
)
5
0
5
5
16
16
)
Keyboard/Mouse DBBIN Data
Keyboard/Mouse DBBIN Data
16
16
16
16
).
, data or address 64
(Continued)
and 63
and 61
and 63
Description
Description
Description
246
16
4
0
4
4
)
16
16
16
A2
3
0
3
3
16
, control). The bit is cleared when the core
F0
2
0
2
2
IBF
1
0
1
1
OBF
0
0
0
0
Revision 1.2