pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 209

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
4.0 Embedded Controller Modules
A battery supply pin (V
continue functioning even in Power Off mode. Some registers are reserved and events recorded. These registers and events
are maintained by V
Details of the activity of each battery-operable module are provided in the module’s specification.
4.17.3 Switching Between Power Modes
The switching from one power mode to another is done using the protocols described below.
Figure 73 shows the three power modes of the core domain and the transitions between them.
Wake-Up Event
Some of the power-up switchings are based on receiving a wake-up event. This event has three possible sources:
The wake-up is identified by a high level on the maskable event and/or a low-to-high transition on NMI or ISE interrupts.
Once a wake-up event is detected, it is latched until an interrupt acknowledge bus cycle is detected or a reset is applied.
Decreasing Power Consumption
Entering Idle Mode
Enter Idle mode by setting (1) IDLE bit in PMCSR register and then executing the WAIT instruction. WBPSM must be set
before executing WAIT.The HFCG may be disabled to further reduce the power consumption. This is done by writing 1 to
DHF in PMCSR register before executing WAIT.
Entering Power Off Mode
Switch to Power Off mode by turning off the supply to the V
as well.
The PFAIL input may be used to interrupt the PC87591L-N05 so that context saving to a non-volatile memory can be com-
pleted and write operations to the RTC can be stopped before the power to the PC87591L-N05 is disconnected.
Increasing Activity
Fast Wake-Up from Idle Mode to Active
A hardware wake-up event causes the core domain to switch directly from Idle mode to Active mode. The following sequence
is performed:
1. DHF in PMCSR register is cleared, thus enabling the high-frequency clock (if it was disabled).
2. After waiting for the high-frequency clock to become active (OHFC in PMCSR register is set), the core domain switches
When in Active mode, Idle bit in PMCSR register is cleared.
If the core was executing a WAIT instruction, it resumes operation by entering an interrupt routine (an enabled interrupt in
the ICU, NMI or ISE).
• A maskable event (from MIWU)
• A Non-Maskable Interrupt (NMI)
• An ISE interrupt (from the Debugger interface)
to Active mode.
PP
, as noted.
BAT
Reset
) provides power to the RTC and low-frequency clock oscillator (LFCO), allowing these parts to
Figure 73. Power Modes and Transitions
and WAIT
Turn off supply
IDLE =1
(Continued)
CC
209
Power Off
pins of the PC87591L-N05. Note that V
Active
Idle
HW event
Turn on power
supply and
apply reset
DD
must be turned off
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