pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 182

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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4.0 Embedded Controller Modules
DAC Control Register (DACCTRL)
This register controls the operation of the DAC module. DACCTRL is cleared (00
Location: 00 FF40
Type:
DAC Data Channel 0-3 Registers (DACDAT0-3)
These registers hold the data to be loaded into Channels 0-3 of the DAC. These registers are not affected by reset or disable
of the respective channel.
Location: Channel 0 - 00 FF42
Type:
Bit
Name
Reset
Bit
Name
7-5
Bit
7-0
Bit
0
1
2
3
4
DACEN0 (DAC Channel 0 Enable). Enables the DAC channel. The DA0 output pin drives a voltage level,
according to the value written into the corresponding DACDAT0 register.
When cleared, the DA0 output pin drives 0V.
0: Disabled (default)
1: Enabled
DACEN1 (DAC Channel 1 Enable). Same as DACEN0 bit description, using DA1 output and DACDAT1
register.
DACEN2 (DAC Channel 2 Enable). Same as DACEN0 bit description, using DA2 output and DACDAT2
register.
DACEN3 (DAC Channel 3 Enable). Same as DACEN0 bit description, using DA3 output and DACDAT3
register.
ENIDLE (Enable in Idle). Controls the DAn (n=0 to 3) outputs in Idle mode.
0: Disabled - DAn outputs drive 0V (default)
1: Enabled - DAn outputs according to DACENn bits and DACDATn registers
Reserved.
DAC Data. 8-bit unsigned binary value used for the D/A operation.
R/W
Channel 1 - 00 FF44
Channel 2 - 00 FF46
Channel 3 - 00 FF48
R/W
16
7
0
7
Reserved
16
16
16
16
6
0
6
5
0
5
(Continued)
ENIDLE
Description
Description
182
4
0
4
DAC DATAi
DACEN3
3
0
3
16
) on reset.
DACEN2
2
0
2
DACEN1
1
0
1
DACEN0
0
0
0
Revision 1.2