pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 299
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 299 of 401
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Revision 1.2
6.0 Host-Controlled Modules and Host Interface
Standard Logical Device Configuration Register Definitions
Write accesses to unimplemented registers (i.e., accessing the Data register while the Index register points to a non-existing
register) are ignored; reads return 00
(indicating that no DMA channel is active). The configuration registers are accessible immediately after Host Domain reset.
In the registers below, any undefined bit is reserved. Unless otherwise noted, the following definitions also hold true:
• All registers are read/write.
• All reserved bits return 0 on reads except where noted. To prevent unpredictable results, do not modify these bits.
• Write-only registers should not use read-modify-write during updates.
Use read-modify-write to prevent the values of reserved bits from being changed during write.
(One per Logical Device)
Figure 101. Structure of Standard Configuration Register File
LDN
04
05
06
0F
10
11
12
16
16
16
16
16
16
16
Table 38. Logical Device Number (LDN) Assignments
Banks
16
Mobile System Wake-Up Control (MSWC)
Keyboard and Mouse Controller (KBC) - Mouse Interface
Keyboard and Mouse Controller (KBC) - Keyboard Interface
Shared BIOS and Protection
Real Time Clock
Power Management I/F Channel 1
Power Management I/F Channel 2
07
20
2F
30
60
63
70
71
74
75
F0
FE
for all addresses except 74
16
16
16
16
16
16
16
16
16
16
16
16
Logical Device Number Register
Logical Device Control Register
SuperI/O Configuration Registers
Special (Vendor-Defined)
Standard Logical Device
Configuration Registers
Configuration Registers
Logical Device
Functional Block
299
16
and 75
(Continued)
16
(DMA configuration registers), which return 04
Bank Select
www.national.com
16
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