pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 21

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
Table of Contents
A.2
A.3
A.4
A.1.24
A.1.25
A.1.26
A.1.27
A.1.28
HOST DOMAIN REGISTERS .................................................................................................. 380
A.2.1
A.2.2
CORE DOMAIN REGISTER LAYOUT .................................................................................... 383
A.3.1
A.3.2
A.3.3
A.3.4
A.3.5
A.3.6
A.3.7
A.3.8
A.3.9
A.3.10
A.3.11
A.3.12
A.3.13
A.3.14
A.3.15
A.3.16
A.3.17
A.3.18
A.3.19
A.3.20
A.3.21
A.3.22
A.3.23
HOST DOMAIN REGISTER LAYOUT ..................................................................................... 390
A.4.1
Universal Synchronous/Asynchronous Receiver Transmitter (USART) 1 ................. 377
Universal Synchronous/Asynchronous Receiver Transmitter (USART) 2 ................. 378
Shared Memory Core ................................................................................................ 378
Core Access to SuperI/O ........................................................................................... 378
Mobile System Wake-Up Control (MSWC) ................................................................ 379
Configuration Registers ............................................................................................. 380
Host Runtime Registers ............................................................................................. 381
Module Configuration ................................................................................................ 383
Bus Interface Unit (BIU) ............................................................................................. 384
DMA Controller .......................................................................................................... 384
General-Purpose I/O (GPIO) Port ............................................................................. 384
PS/2 Interface ............................................................................................................ 385
Core Interface ............................................................................................................ 385
Multi-Function Timer (MFT16) ................................................................................... 386
Timing and Watchdog (TWD) .................................................................................... 386
Analog to Digital Converter (ADC) ............................................................................. 386
Digital to Analog (DAC) ............................................................................................. 386
ACCESS.bus Interface (ACB) ................................................................................... 386
Analog Comparators Monitor (ACM) ......................................................................... 387
Power Management (PM) .......................................................................................... 387
High-Frequency Clock Generator (HFCG) ................................................................ 387
Development System Support ................................................................................... 387
Multi-Input Wake-Up (MIWU) .................................................................................... 387
Interrupt Control Unit (ICU) ........................................................................................ 388
Debugger Interface .................................................................................................... 388
Pulse with Modulator (PWM) ..................................................................................... 388
Universal Synchronous/Asynchronous Receiver Transmitter
Shared Memory Core ................................................................................................ 389
Core Access to SuperI/O Modules ............................................................................ 389
MSWC ....................................................................................................................... 389
SuperI/O Configuration .............................................................................................. 390
(Continued)
Common SuperI/O Configuration ......................................................................... 380
Shared Memory .................................................................................................... 380
RTC Configuration ................................................................................................ 380
Shared Memory Host ........................................................................................... 381
MSWC Host Registers ......................................................................................... 381
Host Interface (HI) ................................................................................................ 381
Power Management Channel 1 ............................................................................ 382
Power Management Channel 2 ............................................................................ 382
RTC
Host Configuration Registers ............................................................................... 390
(USART1 and USART2) ..................................................................................... 389
................................................................................................................... 383
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