HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 189

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
5.4.2
The sources for internal interrupts from on-chip peripheral modules have the following features:
• For each on-chip peripheral module there are flags that indicate the interrupt request status,
• The interrupt priority level can be set by means of IPR.
• The DMAC and DTC can be activated by a TPU, SCI, or other interrupt request.
• When the DMAC or DTC is activated by an interrupt request, it is not affected by the interrupt
5.5
Table 5.2 shows interrupt exception handling sources, vector addresses, and interrupt priorities.
For default priorities, the lower the vector number, the higher the priority. When interrupt control
mode 2 is set, priorities among modules can be set by means of the IPR. Modules set at the same
priority will conform to their default priorities. Priorities within a module are fixed.
IRQn
input
and enable bits that select enabling or disabling of these interrupts. They can be controlled
independently. When the enable bit is set to 1, an interrupt request is issued to the interrupt
controller.
control mode or CPU interrupt mask bit.
Note: n = 15 to 0
Internal Interrupts
Interrupt Exception Handling Vector Table
Figure 5.2 Block Diagram of Interrupts IRQ15 to IRQ0
IRQnSCA, IRQnSCB
level detection
Edge/
circuit
Clear signal
R
S
IRQnF
Rev.7.00 Mar. 18, 2009 page 121 of 1136
Q
IRQnE
Section 5 Interrupt Controller
REJ09B0109-0700
IRQn interrupt
request

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