HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 396

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
ETCRAL is decremented by 1 each time a byte or word transfer is performed. In response to a
single transfer request, burst transfer is performed until the value in ETCRAL reaches H'00.
ETCRAL is then loaded with the value in ETCRAH. At this time, the value in the MAR register
for which a block designation has been given by the BLKDIR bit in DMACRA is restored in
accordance with the DTSZ, SAID/DAID, and SAIDE/DAIDE bits in DMACR.
Rev.7.00 Mar. 18, 2009 page 328 of 1136
REJ09B0109-0700
Address T
Address B
Legend:
Address
Address
Address
Address
Where :
A
A
T
T
B
B
L
L
N
M
A
B
A
B
A
B
= L
= L
= L
= L
= Value set in MARA
= Value set in MARB
= Value set in ETCRB
= Value set in ETCRAH and ETCRAL
Figure 7.14 Operation in Block Transfer Mode (BLKDIR = 1)
A
B
A
B
+ SAIDE · (–1)
+ DAIDE · (–1)
Block area
SAID
DAID
· (2
· (2
DTSZ
DTSZ
Consecutive transfer
of M bytes or words
is performed in
response to one
request
· (N – 1))
· (M·N – 1))
Transfer
2nd block
1st block
Nth block
Address T
Address B
B
B