HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 298

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Bus Controller (BSC)
Rev.7.00 Mar. 18, 2009 page 230 of 1136
REJ09B0109-0700
(Address shift size set to 8 bits)
DCTL
Figure 6.51 Example of DQMU and DQML Byte Control
This LSI
Notes: 1. Bank control is not available.
CS5 (SDRAMφ)
UCAS (DQMU)
LCAS (DQML)
2. The CKE and CS pins must be fixed to 1 when the power supply is input.
3. The CS pin must be fixed to 0 before accessing synchronous DRAM.
D15 to D0
CS2 (RAS)
CS3 (CAS)
I/O PORT
CS4 (WE)
OE (CKE)
A23
A21
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
64-Mbit synchronous DRAM
1 Mword × 16 bits × 4-bank configuration
8-bit column address
DQMU
RAS
CAS
WE
A13 (BS1)
A12 (BS0)
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ15 to DQ0
CKE
CS
CLK
DQML
address: A13/A12
input: A11 to A0
Column address
input: A7 to A0
Row address
Bank select

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