HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 703

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
12.3.2
PODRH and PODRL store output data for use in pulse output. A bit that has been set for pulse
output by NDER is read-only and cannot be modified.
PODRH
Bit
7
6
5
4
3
2
1
0
PODRL
Bit
7
6
5
4
3
2
1
0
12.3.3
NDRH, NDRL store the next data for pulse output. The NDR addresses differ depending on
whether pulse output groups have the same output trigger or different output triggers.
Bit Name
POD15
POD14
POD13
POD12
POD11
POD10
POD9
POD8
Bit Name
POD7
POD6
POD5
POD4
POD3
POD2
POD1
POD0
Output Data Registers H, L (PODRH, PODRL)
Next Data Registers H, L (NDRH, NDRL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Output Data Register 15 to 8
For bits which have been set to pulse output by
NDERH, the output trigger transfers NDRH values
to this register during PPG operation. While
NDERH is set to 1, the CPU cannot write to this
register. While NDERH is cleared, the initial output
value of the pulse can be set.
Description
Output Data Register 7 to 0
For bits which have been set to pulse output by
NDERL, the output trigger transfers NDRL values
to this register during PPG operation. While
NDERL is set to 1, the CPU cannot write to this
register. While NDERL is cleared, the initial output
value of the pulse can be set.
Section 12 Programmable Pulse Generator (PPG)
Rev.7.00 Mar. 18, 2009 page 635 of 1136
REJ09B0109-0700

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