HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 296

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Bus Controller (BSC)
6.7.11
When synchronous DRAM with a ×16-bit configuration is connected, DQMU and DQML are
used for the control signals needed for byte access.
Figures 6.49 and 6.50 show the control timing for DQM, and figure 6.51 shows an example of
connection of byte control by DQMU and DQML.
Rev.7.00 Mar. 18, 2009 page 228 of 1136
REJ09B0109-0700
Upper data bus
Lower data bus
Precharge-sel
Address bus
Byte Access Control
SDRAMφ
DQMU
DQML
CKE
RAS
CAS
WE
φ
(Upper Byte Write Access: SDWCD = 0, CAS Latency 2)
Figure 6.49 DQMU and DQML Control Timing
Column address
PALL
T
p
Row address
Row address
ACTV
T
r
High
High
NOP
T
c1
High impedance
Column address
WRIT
T
cl
NOP
T
c2

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