HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 175

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 3.32 Definition of Overflow Protection for Integer Arithmetic Operations
Note:
3.5.12
The DSP unit of this LSI provides additional two independent registers, MACL and MACH, in
order to support CPU instruction multiply/MAC operations. They can be also used as temporary
storage registers by local data move instructions between MACH/L and other DSP registers.
Figure 3.22 shows the flow of seven local data move instructions. Table 3.33 shows the variation
of this type of instruction.
Table 3.33 Variation of Local Data Move Operations
This instruction is very similar to other transfer instructions. If either the A0 or A1 register is
specified as the destination operand of PSTS, the signed bit is sign-extended and copied into the
corresponding guard-bit parts, A0G or A1G. The DC bit in DSR and other condition code bits are
not updated regardless of the instruction result. This instruction can operate with MOVX and
MOVY in parallel.
Sign
Positive
Negative
Mnemonic
PLDS
PSTS
*
Local Data Move Instruction
means don’t care.
Overflow Condition
Result > 2
Result < –2
Function
Data move from DSP register to MACL/MACH
Data move from MACL/MACH to DSP register
Figure 3.22 Local Data Move Instruction Flow
15
15
– 1
PSTS
X0
X1
A0
A1
MACH
MACL
Fixed Value
2
–2
15
15
– 1
A0G
M0
M1
Y0
Y1
Cannot be used
PLDS
A1G
Rev. 1.00, 02/04, page 137 of 804
DSR
Hex Representation
00 7FFF ****
FF 8000 ****
Operand
Dz
Dz