HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 250
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HD6417660
Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417660.pdf
(846 pages)
- Current page: 250 of 846
- Download datasheet (6Mb)
8.4.3
On-chip peripheral module interrupts are generated by the following modules*:
• DMA controller (DMAC)
• Serial I/O with FIFO (SIOF)
• Serial communication interfaces with FIFO (SCIF0 and SCIF1)
• USB host controller (USBH)
• USB function controller (USBF)
• Timer unit (TMU)
• Watchdog timer (WDT)
• User-debugging interface (H-UDI)
Note: * An interrupt generated at the bluetooth interface (BT) is not handles as a on-chip
Not every interrupt source is assigned a different interrupt vector. Sources are reflected in the
interrupt event register 2 (INTEVT2). It is easy to identify sources by using the value of the
INTEVT2 register as a branch offset.
A priority level (from 0 to 15) can be set for each module except H-UDI by writing to interrupt
priority registers A to H (IPRA to IPRH). The priority level of the H-UDI interrupt is 15 (fixed).
The interrupt mask bits (I3 to I0) in the status register are not affected by on-chip peripheral
module interrupt handling.
8.4.4
There are three types of interrupt sources: NMI, IRQ, and on-chip peripheral modules. The
priority of each interrupt source is set within priority levels 0 to 15; level 15 is the highest and
level 1 is the lowest. When the priority is set to level 0, that interrupt is masked and the interrupt
request is ignored.
Table 8.4 lists the codes for the interrupt event register 2 (INTEVT2) and the order of interrupt
priority.
Each interrupt source is assigned a unique code by INTEVT2. The start address of the interrupt
service routine is common for each interrupt source. This is why, for instance, the value of
INTEVT2 is used as an offset at the start of the interrupt service routine and branched to in order
to identify the interrupt source.
Rev. 1.00, 02/04, page 212 of 804
On-Chip Peripheral Module Interrupts
Interrupt Exception Handling and Priority
peripheral module interrupt and is connected to the eternal interrupt pin (IRQ1) of this
LSI. The USB function controller (USBF) standby recovery interrupt is not handled as
a on-chip peripheral module interrupt and is connected to the external interrupt pin
(IRQ7) of this LSI.
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