HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 76

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

2.3.1
General Registers
There are twenty-four general registers: R0_BANK0 to R7_BANK0, R0_BANK1 to R7_BANK1,
and R8 to R15. Figure 2.7 shows the general register configuration. R0 to R7 are banked. The
processing mode and the register bank (RB) bit in the status register (SR) determine which set of
banked registers (R0_BANK0 to R7_BANK0 or R0_BANK1 to R7_BANK1) are accessed as
general registers. R0 to R7 registers in the selected bank are accessed as R0 to R7. R0 to R7 in the
non-selected bank is accessed as R0_BANK to R7_BANK by the control register load instruction
(LDC) and control register store instruction (STC).
In user mode, bank 0 is selected regardless of the RB bit value. Sixteen registers: R0_BANK0 to
R7_BANK0 and R8 to R15 are accessed as general registers R0 to R15. R0_BANK1 to
R7_BANK1 registers in bank 1 cannot be accessed.
In privileged mode that is entered by a transition to the exception handling state, the RB bit is set
to 1 to select bank 1. In this case, sixteen registers: R0_BANK1 to R7_BANK1 in bank 1 and R8
to R15 are accessed as general registers R0 to R15. A bank is switched automatically when an
exception handling state is entered, registers R0 to R7 need not be saved by the exception handling
routine. R0_BANK0 to R7_BANK0 in bank 0 can be accessed as R0_BANK to R7_BANK by
the LDC or STC instructions.
In privileged mode, bank 0 can also be used as general registers by clearing the RB bit to 0. In
this case, sixteen registers: R0_BANK0 to R7_BANK0 in bank 0 and R8 to R15 are accessed as
general registers R0 to R15. R0_BANK1 to R7_BANK1 in bank 1 can be accessed as R0_BANK
to R7_BANK by the LDC or STC instructions.
The general registers R0 to R15 are used as equivalent registers for almost all instructions. In
some instructions, R0 is implicitly used or only R0 may be used as source or destination registers.
Rev. 1.00, 02/04, page 38 of 804