HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 67
HD6417660
Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417660.pdf
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2.1
2.1.1
This LSI supports four types of processing states: a reset state, an exception handling state, a
program execution state, and a power-down state, according to the CPU processing states.
Reset State: In the reset state, the CPU is reset. The LSI supports two types of resets: power-on
reset and manual reset. For details on resets, refer to section 4, Exception Handling.
In a power-on reset, the registers and internal statuses of all LSI on-chip modules are initialized.
In a manual reset, the register contents of a part of the LSI on-chip modules, such as the bus state
controller (BSC), are retained. For details, refer to section 27, List of Registers.
The CPU internal statuses and registers are initialized both in a power-on reset and manual reset.
After initialization, the program branches to address H'A0000000 to pass control to the reset
processing program defined by the user to be executed.
Exception Handling State: In the exception handling state, the CPU processing flow is changed
temporarily by a general exception or interrupt exception processing. The program counter (PC)
and status register (SR) are saved in the save program counter (SPC) and save status register
(SSR), respectively. The program branches to an address obtained by adding a vector offset to the
vector base register (VBR) and passes control to the exception handling program defined by the
user to be executed.
For details on exception handling states, refer to section 4, Exception Handling.
Program Execution State: The CPU executes programs sequentially.
Power-Down State: The CPU stops operation to reduce power consumption. The power-down
state can be entered by executing the SLEEP instruction. For details on the power-down state,
refer to section 13, Power-Down Modes.
Figure 2.1 shows a status transition diagram.
CPUS3D0S_0100200302000
Processing States and Processing Modes
Processing States
Section 2 CPU
Rev. 1.00, 02/04, page 29 of 804
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