HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 606

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
20.3.8
EPDR2i is a 128-byte 8-bit transmit FIFO buffer for endpoint 2i. EPDR2i has a dual-buffer
configuration, and has a capacity of twice the maximum packet size. When transmit data is written
to this FIFO buffer and EP2iPKTE in TRG is set, one packet of transmit data is fixed, and the
dual-FIFO buffer is switched over. Transmit data for this FIFO buffer can be transferred by DMA.
This FIFO buffer can be initialized by means of EP2iCLR in FCLR.
20.3.9
EPDR2o is a 128-byte 8-bit receive FIFO buffer for endpoint 2o. EPDR2o has a dual-buffer
configuration, and has a capacity of twice the maximum packet size. The number of receive byte is
displayed in the EPSZ2o register. The buffer on read side can be received again by writing
EP2oRDFN in TRG to 1 after data is read. The receive data of this FIFO buffer can be transferred
by DMA. This FIFO buffer can be initialized by means of EP2oCLR in FCLR.
20.3.10 EP3i Data Register (EPDR3i)
EPDR3i is a 128-byte 8-bit transmit FIFO buffer for endpoint 3i. EPDR3i has a dual-buffer
configuration, and has a capacity of twice the maximum packet size. When transmit data is written
to this FIFO buffer and an SOF packet is received, one packet of transmit data is fixed, and the
dual-FIFO buffer is switched over. This FIFO buffer can be initialized by means of EP3iCLR in
FCLR.
Note: When an SOF packet cannot be received, an SOF interrupt is generated by an SOF marker
Rev. 1.00, 02/04, page 568 of 804
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
function. However, data in a frame which could not receive an SOF is invalid.
Bit Name
D7 to D0
Bit Name
D7 to D0
Bit Name
D7 to D0
EP2i Data Register (EPDR2i)
EP2o Data Register (EPDR2o)
Initial Value
Undefined
Initial Value
Undefined
Initial Value
Undefined
R/W
W
R/W
R
R/W
W
Description
Data register for endpoint 2i transfer
Description
Data register for endpoint 2o transfer
Description
Data register for endpoint 3i transfer

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