HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 258

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
9.2
Table 9.1 shows the pin configuration of BSC.
Table 9.1
Rev. 1.00, 02/04, page 220 of 804
Name
A23 to A0
D15 to D0
BS
CS0, CS3, CS4 O
RD/WR
RD
WE1/DQM1
WE0/DQM0
RAS
CAS
CKE
WAIT
BREQ
BACK
MD5
REFOUT
BOOT_E
Input/Output Pins
Pin Configuration
O
O
O
O
O
O
O
O
I
I
O
I
O
I
I/O
O
I/O
Function
Address Bus
Data Bus
Bus Cycle Start
Asserted when a normal space or burst ROM is accessed. Asserted by the
same timing as CAS in SDRAM access.
Chip Select
Read/Write
Connects to WE pins when SDRAM or byte-selection SRAM is connected.
Read Pulse Signal (read data output enable signal)
WE1: Controls that D15 to D8 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
DQM1: Controls that D15 to D8 are being selected.
Connected to the DQM1 pin when SDRAM is connected.
WE0: Controls that D7 to D0 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
DQM0: Controls that D7 to D0 are being selected.
Connected to the DQM0 pin when SDRAM is connected.
Connects to the RAS pin when SDRAM is connected.
Connects to the CAS pin when SDRAM is connected.
Connected to the CKE pin when SDRAM is connected.
External Wait Input
Bus Request Input
Bus enable output
Endian Select
0: Big endian
1: Little endian
Refresh request output when a bus is released
Boot Enable
For details see section 17, BOOT Function (BOOT).

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