HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 317
HD6417660
Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417660.pdf
(846 pages)
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Self-refresh timing is shown in figure 9.24. Settings must be made so that self-refresh clearing
and data retention are performed correctly, and auto-refreshing is performed at the correct
intervals. When self-refreshing is activated from the state in which auto-refreshing is set, or
when exiting standby mode other than through a power-on reset, auto-refreshing is restarted if
the RFSH bit is set to 1 and the RMODE bit is cleared to 0 when self-refresh mode is cleared.
If the transition from clearing of self-refresh mode to the start of auto-refreshing takes time,
this time should be taken into consideration when setting the initial value of RTCNT. Making
the RTCNT value 1 less than the RTCOR value will enable refreshing to be started
immediately.
After self-refreshing has been set, the self-refresh state continues even if the chip standby state
is entered using the LSI standby function, and is maintained even after recovery from standby
mode other than through a power-on reset. In case of a power-on reset, the bus state
controller’s registers are initialized, and therefore the self-refresh state is cleared.
After self-refreshing has been cleared, CKE should be high for a specified time for the
SDRAM. When the SDRAM is in power-down mode (PDOWN in SDCR is set to 1),
transition to self-refresh mode should be made after clearing power-down mode.
D15 to D0
A23 to A0
DACK*
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
DQMn
RD/WR
A11*
CKIO
CKE
RAS
CAS
CS3
BS
1
2
2. The waveform for DACK is when active low is specified.
PALL
Tp
Tpw
Figure 9.24 Self-Refresh Timing
SELF
Trr
Hi-z
Trc
Trc
Rev. 1.00, 02/04, page 279 of 804
Trc
Trc
Trc
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