HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 340

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

10.3.4
CHCR is 32-bit readable/writable register that controls the DMA transfer mode. The CHCR is
initialized at reset and retains the current value in the standby or module standby mode.
Rev. 1.00, 02/04, page 302 of 804
Bit
31 to 27
26
25
24
23
DMA Channel Control Register (CHCR)
Bit Name

RPT
RAS
DA
DO
Initial
Value
All 0
0
0
0
0
R/W
R
R
R
R
R/W
Descriptions
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
Repeat Mode
This bit specifies whether the DMA transfer is carried out in
repeat mode or normal mode.
0: DMA transfer is carried out in normal mode
1: DMA transfer is carried out in repeat mode
Repeat Space Set
This bit sets repeat space as transfer source or transfer
destination
0: Repeat area is transfer destination
1: Repeat area is transfer source
DMA Asynchronous
This bit specifies whether the DREQ signal is synchronous
signal or asynchronous signal
This bit is valid only in CHCR_0. In CHCR_1 to CHCR_3,
this bit is reserved. The write value should always be 0. If 1
is written to this bit, correct operation cannot be
guaranteed.
0: DREQ is an asynchronous signal
1: DREQ is a synchronous signal
DMA Overrun
This bit selects whether DREQ is detected by overrun 0 or
by overrun 1. This bit is valid only in CHCR_0. This bit is
reserved in CHCR_1 to CHCR_3. The write value should
always be 0. If 1 is written to this bit, correct operation
cannot be guaranteed.
0: Detects DREQ by overrun 0
1: Detects DREQ by overrun 1