HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 335

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

This LSI includes the direct memory access controller (DMAC).
The DMAC can be used in place of the CPU to perform high-speed transfers between external
devices that have DACK (transfer request acknowledge signal), external memory, on-chip
memory, memory-mapped external devices, and on-chip peripheral modules.
10.1
• Four channels (One channel can receive an external request)
• 4-GB physical address space
• Data transfer unit is selectable: Byte, Word (two bytes), Longword (four bytes), and 16 Bytes
• Maximum transfer count: 16777216 transfers (24 bits)
• Address mode: Dual address mode and single address mode are supported.
• Transfer requests
• Selectable bus modes
• Selectable channel priority levels: The channel priority levels are selectable between fixed
• Interrupt request: An interrupt request can be generated to the CPU at the end of the specified
• External request detection: There are following four types of DREQ input detection.
• Transfer request acknowledge and transfer end signals: Active levels for DACK and TEND
Figure 10.1 shows the block diagram of the DMAC.
DMAS302A_000020030200
Channel 0 can receive an external request.
(longword × 4)
 External request
 On-chip peripheral module request
 Auto request
The following modules can issue an on-chip peripheral module request.
 SCIF0, SCIF1, SIOF, and USBF
 Cycle steal mode (normal mode and intermittent mode)
 Burst mode
mode and round-robin mode.
counts of data transfer.
 Low level detection
 High level detection
 Rising edge level detection
 Falling edge level detection
can be set independently.
Section 10 Direct Memory Access Controller (DMAC)
Features
Rev. 1.00, 02/04, page 297 of 804